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Posted Date :  Nov-03-09 
AZ-Chandler-Senior-Embedded Design Engineer
Embedded System; Embedded System
Embedded, Verilog
Location : Chandler, AZ
Domain : IT/Software,
Experience Level : Senior
Pay Rate : Market
Duration : 3 Months
Preferred Work Authorization :  US Citizen      Security Clearance       Green Card       EAD / TN           H1B Work Permit       Need H1B       Others 
Preferred Employment :               Corp-Corp      W2-Permanent           W2-Contract      1099-Contract    Contract to Hire         Need H1B 
Skill & Job Description:
Years of Experience & Expertise Level: 10yrs.; Sr. Level

Project Description:
USB Design block integration, validation and qualified for all freeze requirements.

Daily Responsibilities:

RTL modification, unit and full chip regression and debug, test writing, synthesis timing closure and all aspects of design qualification for tape out.

Necessary Skills (Must Have):

Proven USB design ownership, proficiency in Verilog and front end design processes such as synthesis, GLS, spyglass etc. sufficient to meet all design requirements for freeze criteria. Record of design block ownership to meet milestones and schedule requirements.

Additional Skills Desired (Nice to Have):
Familiarity with Intel chipset validation environment and DFX, post-silicon debug
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