|
Posted Date :
Oct-27-09
|
|
|
CA-San Jose-Senior-Signal Integrity Engineer |
|
Other/Multiple Skills; x-Other |
|
Timing/Signal analysis, Electrical design, 2D and 3D filed solver, Power integrity tool(s) |
| Location |
: |
San Jose, CA |
| Domain |
: |
|
| Experience Level |
: |
Senior |
| Pay Rate |
: |
Market |
| Duration |
: |
1 Year |
|
|
Preferred Work Authorization :
US Citizen  Security Clearance
 Green Card
EAD / TN
H1B Work Permit
Need H1B
Others
|
| Preferred Employment :
Corp-Corp
W2-Permanent
W2-Contract
1099-Contract
Contract to Hire
Need H1B |
Looking for a Signal Integrity Engineer with experience in the following areas:
1. Timing/Signal analysis for high-speed parallel bus design.
2. Electrical design constraints in chip package design
3. 2D and 3D filed solver
4. Power integrity tool(s)
5. Good communication skills and documentation experience.
6. Knows VNA, probe station, high-BW scope. Lab probing techniques.
Plus to have:
Familiar with SerDes channel design and design tradeoffs with SerDes macro. |
|
|
|
|
|
|
